c7228589a9
* An xbus transport now have a "model_string" member * The xpp_usb driver fills this with "usb:<idVendor>/<idProduct>/<bcdDevice>" * It is passed via environment to the "init_card_<type>_<protocol>" scripts * The FXS script uses this to condition two registers according to the power supply model. Signed-off-by: Tzafrir Cohen <tzafrir.cohen@xorcom.com> git-svn-id: http://svn.asterisk.org/svn/dahdi/linux/trunk@10300 a0bf4364-ded3-4de4-8d8a-66a801d63aff
598 lines
12 KiB
Perl
Executable File
598 lines
12 KiB
Perl
Executable File
#! /usr/bin/perl -w
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use strict;
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# Make warnings fatal
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local $SIG{__WARN__} = sub { die @_ };
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#
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# Written by Oron Peled <oron@actcom.co.il>
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# Copyright (C) 2006, Xorcom
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#
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# All rights reserved.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 2 of the License, or
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# (at your option) any later version.
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#
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# See the file LICENSE in the top level of this tarball.
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#
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#
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# $Id$
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#
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# Data format:
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# - A comment start with ';' or '#' until the end of line
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# - Blank lines are ignored
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# - Fields are whitespace separated (spaces or tabs)
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#
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# The fields are (in command line order):
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# 1. SLIC select in decimal (range 0-7).
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# * is a special value which means ALL SLICS (only some registers
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# accept settings for ALL SLICS).
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# 2. Command word:
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# - RD Read Direct register.
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# - RS Read Sub-register.
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# - WD Write Direct register.
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# - WS Write Sub-register.
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# 3. Register number in hexadecimal.
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# 4. Low data byte in hexadecimal. (for WD and WS commands).
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# 5. High data byte in hexadecimal. (for WS command only).
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#
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#
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package main;
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use File::Basename;
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use Getopt::Std;
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my $program = basename("$0");
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my $init_dir = dirname("$0");
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BEGIN { $init_dir = dirname($0); unshift(@INC, "$init_dir"); }
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use XppConfig $init_dir;
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my $unit_id;
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my %opts;
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my $vbat_48 = 0;
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getopts('o:', \%opts);
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my %settings;
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$settings{debug} = 0;
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$settings{fxs_skip_calib} = 0;
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my $chipregs;
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sub logit {
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print STDERR "$unit_id: @_\n";
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}
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sub debug {
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logit @_ if $settings{debug};
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}
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# Arrange for error logging
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if (-t STDERR) {
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$unit_id = 'Interactive';
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debug "Interactive startup";
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} else {
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$unit_id = "$ENV{XBUS_NAME}/UNIT-$ENV{UNIT_NUMBER}";
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open (STDERR, "| logger -t $program -p kern.info") || die;
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debug "Non Interactive startup";
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foreach my $k (qw(
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XBUS_NAME
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XBUS_NUMBER
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XBUS_MODEL_STRING
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UNIT_NUMBER
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UNIT_TYPE
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UNIT_SUBUNITS
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UNIT_SUBUNITS_DIR
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XBUS_REVISION
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XBUS_CONNECTOR
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XBUS_LABEL)) {
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unless(defined $ENV{$k}) {
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logit "Missing ENV{$k}\n";
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die;
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}
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}
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logit "XBUS_MODEL_STRING='$ENV{XBUS_MODEL_STRING}'";
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if ($ENV{XBUS_MODEL_STRING} =~ m{.*/.*/201}) {
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$vbat_48 = 1;
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}
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$chipregs = sprintf "/sys/bus/xpds/devices/%02d:%1d:0/chipregs",
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$ENV{XBUS_NUMBER}, $ENV{UNIT_NUMBER};
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if(! -f $chipregs) {
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my $xpd_name = sprintf("XPD-%1d0", $ENV{UNIT_NUMBER});
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$chipregs = "/proc/xpp/$ENV{XBUS_NAME}/$xpd_name/chipregs";
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logit "OLD DRIVER: does not use /sys chipregs. Falling back to /proc"
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if -f $chipregs;
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}
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}
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sub set_output() {
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my $output;
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if($opts{o}) {
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$output = $opts{o};
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} else {
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# No subunits in FXS (everything is subunit 0)
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$output = $chipregs;
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}
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open(REG, ">$output") || die "Failed to open '$output': $!\n";
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my $oldfh = select REG;
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main::logit "# Setting output" if $opts{o};
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return $oldfh;
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}
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sub mysleep($) {
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my $timeout = shift;
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select(undef,undef,undef,$timeout);
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}
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package FXS;
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sub gen {
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my $fmt = shift;
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$| = 1;
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printf "$fmt\n", @_;
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}
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my @SlicNums = (0 .. 7);
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sub write_to_slic_file($) {
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my $write_str = shift;
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open(SLICS,">$chipregs") or
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die("Failed writing to chipregs file $chipregs");
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print SLICS $write_str;
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close(SLICS) or die "Failed writing '$write_str' to '$chipregs': $!";
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main::mysleep(0.001);
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}
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sub read_reg($$$) {
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my $read_slic = shift;
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my $read_reg = shift;
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my $direct = shift;
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write_to_slic_file(
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sprintf("%s R%s %02X", $read_slic, $direct, $read_reg));
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my $retries = 10;
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my @reply;
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# If the command queue is long, we may need to wait...
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WAIT_RESULTS:
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{
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my @results;
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# The time to sleep is a tradeoff:
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# - Too long is a waste of time.
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# - Too short will cause many retries, wastes time.
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# So the current value (after trial and error) is...
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main::mysleep(0.013);
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open(SLICS,$chipregs) or
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die("Failed reading from chipregs file $chipregs");
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while(<SLICS>){
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s/#.*//;
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next unless /\S/;
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@results = /^\s*(\d+)\s+[RW][DI]\s+([[:xdigit:]]+)\s+([[:xdigit:]]+)\s+([[:xdigit:]]*)/;
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if(@results != 4) {
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main::logit "Failed reading from '$chipregs' ($read_slic,$read_reg,$direct)";
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die;
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}
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}
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close(SLICS);
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my $reg = hex($results[1]);
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if($results[0] ne $read_slic || $reg ne $read_reg) {
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# We read obsolete values, need to wait some more
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if(--$retries) {
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main::debug "$read_slic RD $read_reg -- retry ($results[0], $reg)";
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redo WAIT_RESULTS;
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} else {
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main::logit "Failed: $read_slic RD $read_reg returned $results[0], $reg";
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die;
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}
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}
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# Good.
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@reply = (hex($results[2]), hex($results[3]));
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}
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if ($direct eq 'S') {
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return @reply;
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} else {
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return $reply[0];
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}
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}
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# TODO: rearange arguments
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sub write_reg{#($$$$$) {
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my $read_slic = shift;
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my $read_reg = shift;
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my $direct = shift;
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my $reg_val_low = shift;
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my $reg_val_hi = shift;
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my $str = sprintf "%s W%s %02X %02X",
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$read_slic, $direct, $read_reg, $reg_val_low;
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if ($direct eq 'S') {
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$str .= sprintf " %02X", $reg_val_hi;
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}
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write_to_slic_file($str);
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}
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sub log_calib_params() {
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for my $i (100 .. 107) {
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my $line="Calib Reg $i: ";
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for my $slic (@SlicNums) {
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$line .= " ".read_reg($slic, $i, 'D');
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}
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main::debug($line);
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}
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}
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sub init_indirect_registers() {
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return write_to_slic_file("#
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* WS 1E 00 C2 55
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* WS 1E 01 E6 51
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* WS 1E 02 85 4B
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* WS 1E 03 37 49
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* WS 1E 04 33 33
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* WS 1E 05 02 02
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* WS 1E 06 02 02
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* WS 1E 07 98 01
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* WS 1E 08 98 01
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* WS 1E 09 11 06
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* WS 1E 0A 02 02
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* WS 1E 0B E5 00
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* WS 1E 0C 1C 0A
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* WS 1E 0D 30 7B
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* WS 1E 0E 63 00
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* WS 1E 0F 00 00
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* WS 1E 10 70 78
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* WS 1E 11 7D 00
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* WS 1E 12 00 00
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* WS 1E 13 00 00
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* WS 1E 14 FD 7E
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* WS 1E 15 77 01
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* WS 1E 16 00 00
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* WS 1E 17 00 20
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* WS 1E 18 00 20
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* WS 1E 19 00 00
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* WS 1E 1A 00 20
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* WS 1E 1B 00 40
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* WS 1E 1C 00 10
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* WS 1E 1D 00 36
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* WS 1E 1E 00 10
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* WS 1E 1F 00 02
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* WS 1E 20 C0 07
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* WS 1E 21 6F 37
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* WS 1E 22 80 1B
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* WS 1E 23 00 80
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* WS 1E 24 00 08
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* WS 1E 25 00 08
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* WS 1E 26 00 08
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* WS 1E 27 00 08
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* WS 1E 28 00 00
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* WS 1E 2B 00 08 # LCRTL = 5.08 mA
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* WS 1E 63 DA 00
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* WS 1E 64 60 6B
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* WS 1E 65 74 00
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* WS 1E 66 C0 79
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* WS 1E 67 20 11
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* WS 1E 68 E0 3B
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#");
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}
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sub init_early_direct_regs() {
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my $lbv = ($vbat_48) ? "20" : "10";
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my $vcm = ($vbat_48) ? "02" : "03";
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return write_to_slic_file("#
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* WD 08 00 # Audio Path Loopback Control
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* WD 6C 01
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* WD 4A 3F # High Battery Voltage
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* WD 4B $lbv # Low Battery Voltage
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* WD 49 $vcm # Common Mode Voltage (VCM)
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* WD 40 00 # Line Feed Control
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#")
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}
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my @FilterParams = ();
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sub save_indirect_filter_params() {
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for my $slic (@SlicNums) {
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for my $reg (35 .. 39) {
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$FilterParams[$slic][$reg] =
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[read_reg($slic, $reg, 'S')];
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write_reg($slic, $reg, 'S', 0, 0x80);
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}
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}
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}
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sub restore_indirect_filter_params() {
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for my $slic (@SlicNums) {
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for my $reg (35 .. 39) {
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write_reg($slic, $reg, 'S',
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@{$FilterParams[$slic][$reg]});
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}
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}
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}
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my $ManualCalibrationSleepTime = 0.04; # 40ms
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sub manual_calibrate_loop($$) {
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my $write_reg = shift;
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my $read_reg = shift;
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my @curr_slics = @SlicNums;
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# initialize counters
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my @slic_counters = map { 0x1F } @curr_slics;
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# wait until all slics have finished calibration, or for timeout
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while (@curr_slics) {
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my $debug_calib_str = "ManualCalib:: ";
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my @next_slics;
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for my $slic (@curr_slics) {
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write_reg($slic,$write_reg,'D',$slic_counters[$slic]);
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}
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main::mysleep $ManualCalibrationSleepTime;
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for my $slic (@curr_slics) {
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my $value = read_reg($slic, $read_reg, 'D');
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$debug_calib_str .= sprintf " [%d:%d:%X]",
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$slic, $slic_counters[$slic], $value;
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next if $value == 0; # This one is calibrated.
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if ($slic_counters[$slic] > 0) {
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$slic_counters[$slic]--;
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push(@next_slics, $slic);
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} else {
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main::logit("ERROR: SLIC $slic reached 0 during manual calibration");
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}
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}
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@curr_slics = @next_slics;
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main::debug($debug_calib_str);
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}
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main::debug("No more slics to calibrate");
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}
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sub manual_calibrate() {
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manual_calibrate_loop(98, 88);
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manual_calibrate_loop(99, 89);
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}
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sub auto_calibrate($$) {
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my $calib_96 = shift;
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my $calib_97 = shift;
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#log_calib_params();
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# start calibration:
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for my $slic(@SlicNums) {
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write_to_slic_file(
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sprintf
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"$slic WD 61 %02X\n".
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"$slic WD 60 %02X\n".
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"", $calib_97, $calib_96
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);
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}
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# wait until all slics have finished calibration, or for timeout
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# time periods in seconds:
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my $sleep_time = 0.001;
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my $timeout_time = 0.600; # Maximum from the spec
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my @curr_slics = @SlicNums;
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my $sleep_cnt = 0;
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CALIB_LOOP:
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while(1) {
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main::mysleep($sleep_time);
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my @next_slics;
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for my $slic (@curr_slics) {
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main::debug("checking slic $slic");
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my $val = read_reg($slic, 96, 'D');
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push(@next_slics, $slic) if $val != 0;
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}
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@curr_slics = @next_slics;
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last unless @curr_slics;
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if ($sleep_cnt * $sleep_time > $timeout_time) {
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main::logit("Auto Calibration: Exiting on timeout: $timeout_time.");
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last CALIB_LOOP;
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}
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main::debug("auto_calibrate not done yet($sleep_cnt): @curr_slics");
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$sleep_cnt++;
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}
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#log_calib_params();
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}
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sub calibrate_slics() {
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main::debug "Calibrating '$0'";
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auto_calibrate(0x40, 0x1E);
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main::debug "after auto_calibrate";
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manual_calibrate();
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main::debug "after manul_calibrate";
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auto_calibrate(0x40, 0x01);
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main::debug "after auto_calibrate 2";
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main::debug "Continue '$0'";
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}
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sub read_defaults() {
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if(XppConfig::read_config(\%settings)) {
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main::logit "Defaults from $settings{xppconf}";
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} else {
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main::logit "No defaults file, use hard-coded defaults.";
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}
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}
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# Try to identify which slics are valid
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sub check_slics() {
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my @slics;
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foreach my $slic (0 .. 7) {
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my $value = read_reg($slic, 0, 'D');
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push(@slics, $slic) if $value != 0xFF;
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}
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main::logit "Found " . scalar(@slics) . " SLICS (@slics)";
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return @slics;
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}
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package main;
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main::debug "Starting '$0'";
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FXS::read_defaults;
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@SlicNums = FXS::check_slics;
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main::debug "before init_indirect_registers";
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FXS::init_indirect_registers();
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main::debug "after init_indirect_registers";
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FXS::init_early_direct_regs();
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main::debug "after init_early_direct_regs";
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if($settings{fxs_skip_calib}) {
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main::logit "==== WARNING: SKIPPED SLIC CALIBRATION =====";
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} else {
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FXS::calibrate_slics;
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}
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set_output;
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while(<DATA>) {
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chomp;
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s/[#;].*$//; # remove comments
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s/^\s+//; # trim whitespace
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s/\s+$//; # trim whitespace
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s/\t+/ /g; # replace tabs with spaces (for logs)
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next unless /\S/; # Skip empty lines
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main::debug "writing: '$_'";
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print "$_\n";
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}
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close REG;
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main::debug "Ending '$0'";
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close STDERR;
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exit 0;
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# ----------------------------------==== 8-channel FXS unit initialization ===-----------------------------------------
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__DATA__
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# Flush out energy accumulators
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* WS 1E 58 00 00
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* WS 1E 59 00 00
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* WS 1E 5A 00 00
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* WS 1E 5B 00 00
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* WS 1E 5C 00 00
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* WS 1E 5D 00 00
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* WS 1E 5E 00 00
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* WS 1E 5F 00 00
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* WS 1E 61 00 00
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* WS 1E C1 00 00
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* WS 1E C2 00 00
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* WS 1E C3 00 00
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* WS 1E C4 00 00
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* WS 1E C5 00 00
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* WS 1E C6 00 00
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* WS 1E C7 00 00
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* WS 1E C8 00 00
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* WS 1E C9 00 00
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* WS 1E CA 00 00
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* WS 1E CB 00 00
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* WS 1E CC 00 00
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* WS 1E CD 00 00
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* WS 1E CE 00 00
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* WS 1E CF 00 00
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* WS 1E D0 00 00
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* WS 1E D1 00 00
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* WS 1E D2 00 00
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* WS 1E D3 00 00
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# Clear and disable interrupts
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* WD 12 FF
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* WD 13 FF
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* WD 14 FF
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* WD 15 00
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* WD 16 00
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* WD 17 00
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## Mode(8-bit,u-Law,1 PCLK )
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* WD 01 08 # Disable PCM transfers
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# Setting of SLICs offsets
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# New card initialization
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* WD 03 00
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* WD 05 00
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0 WD 02 00
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0 WD 04 00
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0 WD 01 28 # Enable PCM transfers
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1 WD 02 08
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1 WD 04 08
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1 WD 01 28
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2 WD 02 10
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2 WD 04 10
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2 WD 01 28
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3 WD 02 18
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3 WD 04 18
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3 WD 01 28
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4 WD 02 20
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4 WD 04 20
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4 WD 01 28
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5 WD 02 28
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5 WD 04 28
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5 WD 01 28
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6 WD 02 30
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6 WD 04 30
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6 WD 01 28
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7 WD 02 38
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7 WD 04 38
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7 WD 01 28
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# Audio path. (also initialize 0A and 0B here if necessary)
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* WD 08 00
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* WD 09 00
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* WD 0A 08
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* WD 0B 33
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#------ Metering tone
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* WD 2C 00 # Timer dL
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* WD 2D 03 # Timer dH
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* WS 1E 17 61 15 # Amplitue Ramp-up
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* WS 1E 18 61 15 # Max Amplitude
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* WS 1E 19 FB 30 # Frequency
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# Ring regs are set by driver
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# Automatic/Manual Control: defaults but:
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# Cancel AOPN - Power Alarm
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# Cancel ABAT - Battery Feed Automatic Select
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* WD 43 16
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# Loop Closure Debounce Interval
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* WD 45 0A
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# Ring Detect Debounce Interval
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* WD 46 47
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# Battery Feed Control: Battery low (DCSW low)
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* WD 42 00
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# Loop Current Limit
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* WD 47 00
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# On-Hook Line Voltage (VOC)
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* WD 48 20
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* WS 1E 23 00 80
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* WS 1E 24 20 03
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* WS 1E 25 8C 00
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* WS 1E 26 00 00
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* WS 1E 27 10 00
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* WD 0E 00
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