20b5c919a4
Updates the CMD_BYTE macro to use precalculated offsets. Signed-off-by: Shaun Ruffell <sruffell@digium.com> git-svn-id: http://svn.asterisk.org/svn/dahdi/linux/trunk@9970 a0bf4364-ded3-4de4-8d8a-66a801d63aff
291 lines
6.7 KiB
C
291 lines
6.7 KiB
C
/*
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* Wildcard TDM2400P TDM FXS/FXO Interface Driver for DAHDI Telephony interface
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*
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* Written by Mark Spencer <markster@digium.com>
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* Support for TDM800P and VPM150M by Matthew Fredrickson <creslin@digium.com>
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*
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* Copyright (C) 2005-2010 Digium, Inc.
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*
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* All rights reserved.
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*
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*/
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/*
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* See http://www.asterisk.org for more information about
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* the Asterisk project. Please do not directly contact
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* any of the maintainers of this project for assistance;
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* the project provides a web site, mailing lists and IRC
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* channels for your use.
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*
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* This program is free software, distributed under the terms of
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* the GNU General Public License Version 2 as published by the
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* Free Software Foundation. See the LICENSE file included with
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* this program for more details.
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*/
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#ifndef _WCTDM24XXP_H
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#define _WCTDM24XXP_H
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#include <dahdi/kernel.h>
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#include <linux/version.h>
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
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#include <linux/semaphore.h>
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#else
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#include <asm/semaphore.h>
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#endif
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#include "voicebus/voicebus.h"
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#define NUM_FXO_REGS 60
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#define WC_MAX_IFACES 128
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/*!
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* \brief Default ringer debounce (in ms)
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*/
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#define DEFAULT_RING_DEBOUNCE 1024
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#define POLARITY_DEBOUNCE 64 /* Polarity debounce (in ms) */
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#define OHT_TIMER 6000 /* How long after RING to retain OHT */
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#define FLAG_EXPRESS (1 << 0)
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#define EFRAME_SIZE 108L
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#define EFRAME_GAP 20L
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#define SFRAME_SIZE ((EFRAME_SIZE * DAHDI_CHUNKSIZE) + (EFRAME_GAP * (DAHDI_CHUNKSIZE - 1)))
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#define MAX_ALARMS 10
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#define MINPEGTIME 10 * 8 /* 30 ms peak to peak gets us no more than 100 Hz */
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#define PEGTIME 50 * 8 /* 50ms peak to peak gets us rings of 10 Hz or more */
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#define PEGCOUNT 5 /* 5 cycles of pegging means RING */
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#define SDI_CLK (0x00010000)
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#define SDI_DOUT (0x00020000)
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#define SDI_DREAD (0x00040000)
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#define SDI_DIN (0x00080000)
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#define __CMD_RD (1 << 20) /* Read Operation */
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#define __CMD_WR (1 << 21) /* Write Operation */
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#define __CMD_FIN (1 << 22) /* Has finished receive */
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#define __CMD_TX (1 << 23) /* Has been transmitted */
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#define CMD_WR(a,b) (((a) << 8) | (b) | __CMD_WR)
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#define CMD_RD(a) (((a) << 8) | __CMD_RD)
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#if 0
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#define CMD_BYTE(card,bit,altcs) (((((card) & 0x3) * 3 + (bit)) * 7) \
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+ ((card) >> 2) + (altcs) + ((altcs) ? -21 : 0))
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#endif
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#define NUM_MODULES 24
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#define NUM_SLOTS 6
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#define MAX_SPANS 9
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#define NUM_CAL_REGS 12
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#define ISR_COMMANDS 2
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#define QRV_DEBOUNCETIME 20
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#define VPM150M_HPI_CONTROL 0x00
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#define VPM150M_HPI_ADDRESS 0x02
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#define VPM150M_HPI_DATA 0x03
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#define VPM_SUPPORT
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#define VPM150M_SUPPORT
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#ifdef VPM150M_SUPPORT
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#include "voicebus/GpakCust.h"
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#endif
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struct calregs {
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unsigned char vals[NUM_CAL_REGS];
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};
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enum battery_state {
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BATTERY_UNKNOWN = 0,
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BATTERY_PRESENT,
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BATTERY_LOST,
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};
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struct wctdm_cmd {
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struct list_head node;
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struct completion *complete;
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u32 cmd;
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u8 ident;
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};
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/**
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* struct wctdm_span -
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* @span: dahdi_span to register.
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* @timing_priority: What the priority of this span is relative to the other
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* spans.
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* @spanno: Which span on the card this is.
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*
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* NOTE: spanno would normally be taken care of by dahdi_span.offset, but
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* appears to have meaning in xhfc.c, and that needs to be audited before
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* changing. !!!TODO!!!
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*
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*/
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struct wctdm_span {
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struct dahdi_span span;
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int timing_priority;
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int spanno;
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struct wctdm *wc;
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struct b400m_span *bspan;
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};
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struct wctdm_chan {
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struct dahdi_chan chan;
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struct dahdi_echocan_state ec;
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int timeslot;
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};
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struct fxo {
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int wasringing;
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int lastrdtx;
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int lastrdtx_count;
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int ringdebounce;
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int offhook;
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int battdebounce;
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int battalarm;
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enum battery_state battery;
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int lastpol;
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int polarity;
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int polaritydebounce;
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int neonmwi_state;
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int neonmwi_last_voltage;
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unsigned int neonmwi_debounce;
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unsigned int neonmwi_offcounter;
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};
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struct fxs {
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int oldrxhook;
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int debouncehook;
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int lastrxhook;
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int debounce;
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int ohttimer;
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int idletxhookstate; /* IDLE changing hook state */
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/* lasttxhook reflects the last value written to the proslic's reg
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* 64 (LINEFEED_CONTROL) in bits 0-2. Bit 4 indicates if the last
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* write is pending i.e. it is in process of being written to the
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* register
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* NOTE: in order for this value to actually be written to the
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* proslic, the appropriate matching value must be written into the
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* sethook variable so that it gets queued and handled by the
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* voicebus ISR.
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*/
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int lasttxhook;
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int oppending_ms;
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int palarms;
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struct dahdi_vmwi_info vmwisetting;
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int vmwi_active_messages;
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int vmwi_linereverse;
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int reversepolarity; /* polarity reversal */
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struct calregs calregs;
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};
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struct qrv {
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#define RADMODE_INVERTCOR 1
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#define RADMODE_IGNORECOR 2
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#define RADMODE_EXTTONE 4
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#define RADMODE_EXTINVERT 8
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#define RADMODE_IGNORECT 16
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#define RADMODE_PREEMP 32
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#define RADMODE_DEEMP 64
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char hook;
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unsigned short debouncetime;
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unsigned short debtime;
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int radmode;
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signed short rxgain;
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signed short txgain;
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};
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enum module_type {
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NONE = 0,
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FXS,
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FXO,
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FXSINIT,
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QRV,
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BRI,
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};
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struct wctdm_module {
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union {
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struct fxo fxo;
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struct fxs fxs;
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struct qrv qrv;
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struct b400m *bri;
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} mod;
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/* Protected by wctdm.reglock */
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struct list_head pending_cmds;
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struct list_head active_cmds;
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u8 offsets[3];
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u8 subaddr;
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u8 isrshadow[ISR_COMMANDS];
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u8 card;
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enum module_type type;
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int sethook; /* pending hook state command */
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int dacssrc;
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};
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struct wctdm {
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const struct wctdm_desc *desc;
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const char *board_name;
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spinlock_t frame_list_lock;
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struct list_head frame_list;
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unsigned int intcount;
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unsigned char txident;
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unsigned char rxident;
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u8 ctlreg;
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u8 tdm410leds;
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int mods_per_board; /* maximum number of modules for this board */
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int digi_mods; /* number of digital modules present */
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int avchannels; /* active "voice" (voice, B and D) channels */
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spinlock_t reglock; /* held when accessing anything affecting the module array */
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wait_queue_head_t regq;
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struct wctdm_module mods[NUM_MODULES];
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struct vpmadt032 *vpmadt032;
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struct voicebus vb;
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struct wctdm_span *aspan; /* pointer to the spans[] holding the analog span */
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struct wctdm_span *spans[MAX_SPANS];
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struct wctdm_chan *chans[NUM_MODULES];
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#ifdef CONFIG_VOICEBUS_ECREFERENCE
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struct dahdi_fifo *ec_reference[NUM_MODULES];
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#endif
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/* Only care about digital spans here */
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/* int span_timing_prio[MAX_SPANS - 1]; */
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struct semaphore syncsem;
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int oldsync;
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int initialized; /* =1 when the entire card is ready to go */
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unsigned long checkflag; /* Internal state flags and task bits */
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int companding;
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};
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/* Atomic flag bits for checkflag field */
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#define WCTDM_CHECK_TIMING 0
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int wctdm_getreg(struct wctdm *wc, struct wctdm_module *const mod, int addr);
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int wctdm_setreg(struct wctdm *wc, struct wctdm_module *const mod,
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int addr, int val);
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int wctdm_wait_for_ready(const struct wctdm *wc);
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extern struct semaphore ifacelock;
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extern struct wctdm *ifaces[WC_MAX_IFACES];
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#endif
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