Commit r9750 "wct4xxp: Reduce the memory footprint of the hardware
echocanceler.", as part of reducing the non-pageable memory required to
support the VPMOCT064 and VPMOCT128, disabled caching of some hardware
echocan registers. This resulted in more physical reads to the echo
canceler. These new read transactions exposed an existing issue where
sometimes reads could be turned into writes which put a channel into an
unintended state preventing Asterisk from detecting any DTMF.
This issue is resolved by ensuring that the write signal to the Octasic
part is explicitly cleared between when the address is presented on the
bus and when the read and chip select signals are asserted. The cost is
an increase in the average time to enable / disable echo cancellation by
about 5 us on one Intel Xeon X3220 test machine (~250ns increase per
read from the Octasic part and 20 reads to enable / disable a channel).
This commit resolves a behavioral regression first introduced in 2.5.0
and 2.4.1 which could take many calls before revealing itself. This
change only affects cards with a VPMOCT128 or VPMOCT064 installed.
Signed-off-by: Shaun Ruffell <sruffell@digium.com>
Acked-by: Doug Bailey <dbailey@digium.com>
Origin: http://svnview.digium.com/svn/dahdi?view=rev&rev=10220
git-svn-id: http://svn.asterisk.org/svn/dahdi/linux/branches/2.5@10221 a0bf4364-ded3-4de4-8d8a-66a801d63aff
1bf7ebc42f