wcte13xp: Workaround rare nmi on modprobe on select systems
With certain pci controllers that support pci hotplug, during the reset sequence of the fpga, the host controller can get confused about the state of the card and throw an nmi. Known affected systems: HP proliant DL160 & DL360p Dell poweredge R520 Super Micro X7SPA-HF This patch attempts to work around that by removing the fpga reset sequence from the driver startup, then setting various control registers to known starting state values. This patch removes the field upgradeable firmware logic temporarily for the te133 card to prevent fpga reset. Signed-off-by: Russ Meyerriecks <rmeyerriecks@digium.com>
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@ -2839,6 +2839,11 @@ static int t13x_check_firmware(struct t13x *wc)
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if (force_firmware) {
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dev_info(&wc->dev->dev,
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"force_firmware module parameter is set. Forcing firmware load, regardless of version\n");
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} else if (is_pcie(wc)) {
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dev_info(&wc->dev->dev,
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"Firmware %x is running, but we require %x. ERROR: This version of dahdi temporarily disabled field upgradeable firmware. Please upgrade your dahdi revision.\n",
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version, FIRMWARE_VERSION);
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return -EIO;
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} else {
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dev_info(&wc->dev->dev,
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"Firmware %x is running, but we require %x\n",
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@ -2903,6 +2908,26 @@ cleanup:
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return res;
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}
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static void soft_reset_fpga(struct t13x *wc)
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{
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/* digium_gpo */
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iowrite32be(0x0, wc->membase);
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/* xps_intc */
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iowrite32be(0x0, wc->membase + 0x300);
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iowrite32be(0x0, wc->membase + 0x308);
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iowrite32be(0x0, wc->membase + 0x310);
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iowrite32be(0x0, wc->membase + 0x31C);
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/* xps_spi_config_flash */
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iowrite32be(0xA, wc->membase + 0x200);
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/* tdm engine */
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iowrite32be(0x0, wc->membase + 0x2000);
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iowrite32be(0x0, wc->membase + 0x2000);
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iowrite32be(0x0, wc->membase + 0x2000);
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}
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static int __devinit te13xp_init_one(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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@ -2979,10 +3004,7 @@ static int __devinit te13xp_init_one(struct pci_dev *pdev,
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dev_info(&wc->dev->dev, "Unable to request regions\n");
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/* Reset entire fpga */
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pci_save_state(pdev);
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iowrite32be(0xe00, wc->membase + TDM_CONTROL);
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msleep(2000);
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pci_restore_state(pdev);
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soft_reset_fpga(wc);
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/* Enable writes to fpga status register */
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iowrite32be(0, wc->membase + 0x04);
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