xpp: FXS type 6: define registers
Add definitions of REG_TYPE6 for various SI32260 registers. Signed-off-by: Tzafrir Cohen <tzafrir.cohen@xorcom.com>
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@ -122,6 +122,29 @@ enum fxs_state {
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#define REG_TYPE1_LOOPCLOSURE_ZERO 0xF8 /* Loop Closure zero bits. */
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#define REG_TYPE1_LOOPCLOSURE_LCR BIT(0) /* Loop Closure Detect Indicator. */
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/* FXS type 6 registers */
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#define REG_TYPE6_RINGCON 0x26 /* 38 - Ringing Oscillator Control */
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/* 34 - Loop Closure/Ring Trip Detect Status */
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#define REG_TYPE6_LCRRTP 0x22
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#define REG_TYPE6_LCRRTP_ZERO 0xF0 /* Loop Closure zero bits. */
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#define REG_TYPE6_LCRRTP_LCR BIT(1) /* Loop Closure Detect Indicator. */
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#define REG_TYPE6_TONEN 0x3E /* 62 - Hardware DTMF detection */
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#define REG_TYPE6_TONEN_DTMF_DIS BIT(2) /* DTMF Disable */
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#define REG_TYPE6_TONDTMF 0x3C /* 60 - DTMF Decode Status */
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#define REG_TYPE6_EXP_GPIOA 0x12 /* I/O Expander GPIOA */
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#define REG_TYPE6_EXP_GPIOB 0x13 /* I/O Expander GPIOB */
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#define REG_TYPE6_ENHANCE 0x2F /* 47 - Enhance */
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#define REG_TYPE6_USERSTAT 0x42 /* 66 - Userstat */
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#define REG_TYPE6_DIAG1 0x47 /* 71 - Diag1 */
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#define RAM_TYPE6_SLOPE_VLIM 634
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#define SLOPE_VLIM_DFLT 0x1E655196L
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#define SLOPE_VLIM_MWI 0x8000000L
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#define RAM_TYPE6_VBATH_EXPECT 767
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#define VBATH_EXPECT_DFLT 0x2B10A20L
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#define VBATH_EXPECT_MWI 0x6147AB2L
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/*---------------- FXS Protocol Commands ----------------------------------*/
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static bool fxs_packet_is_valid(xpacket_t *pack);
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