415 lines
13 KiB
Plaintext
415 lines
13 KiB
Plaintext
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#! /usr/bin/perl -w
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use strict;
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# Make warnings fatal
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local $SIG{__WARN__} = sub { die @_ };
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#
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# $Id$
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#
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#
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# Written by Oron Peled <oron@actcom.co.il>
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# Copyright (C) 2007, Xorcom
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#
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# All rights reserved.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 2 of the License, or
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# (at your option) any later version.
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#
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# See the file LICENSE in the top level of this tarball.
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#
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# This script is run from the xpp kernel module upon detection
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# of a new XPD.
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#
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# Expects the following environment variables to be set:
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# XBUS_NAME - bus name
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# UNIT_NUMBER - xpd unit number
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# UNIT_SUBUNITS - number of subunits in this xpd
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# UNIT_TYPE - xpd type number (from protocol reply):
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# 1 - FXS
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# 2 - FXO
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# 3 - BRI
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# 4 - PRI
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# XBUS_REVISION - xbus revision number
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# XBUS_CONNECTOR - xbus connector string
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# XBUS_LABEL - xbus label string
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#
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# Output data format:
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# - An optional comment start with ';' or '#' until the end of line
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# - Optional Blank lines are ignored
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# - Fields are whitespace separated (spaces or tabs)
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#
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# The fields are (in command line order):
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# 1. CHIP select in decimal (ignored, taken from 3 LSB's of subunit number)
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# 2. Command word:
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# - RD Read Direct register.
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# - WD Write Direct register.
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# 3. Register number in hexadecimal.
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# 5. Data byte in hexadecimal. (for WD command only).
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#
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package main;
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use File::Basename;
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use Getopt::Std;
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my $program = basename("$0");
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my $init_dir = dirname("$0");
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BEGIN { $init_dir = dirname($0); unshift(@INC, "$init_dir"); }
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use XppConfig $init_dir;
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my $unit_id;
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my %opts;
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getopts('o:', \%opts);
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my %settings;
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sub logit {
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print STDERR "$unit_id: @_\n";
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}
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sub debug {
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logit @_ if $settings{debug};
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}
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# Arrange for error logging
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if (-t STDERR) {
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$unit_id = 'Interactive';
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debug "Interactive startup";
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} else {
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$unit_id = "$ENV{XBUS_NAME}/UNIT-$ENV{UNIT_NUMBER}";
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open (STDERR, "| logger -t $program -p kern.info") || die;
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debug "Non Interactive startup";
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foreach my $k (qw(
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XBUS_NAME
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XBUS_NUMBER
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UNIT_NUMBER
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UNIT_TYPE
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UNIT_SUBUNITS
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UNIT_SUBUNITS_DIR
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XBUS_REVISION
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XBUS_CONNECTOR
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XBUS_LABEL)) {
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unless(defined $ENV{$k}) {
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logit "Missing ENV{$k}\n";
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die;
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}
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}
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}
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sub select_subunit($) {
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my $subunit = shift;
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die unless defined $subunit;
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my $output;
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if($opts{o}) {
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$output = $opts{o};
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} else {
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$output = sprintf "/sys/bus/xpds/devices/%02d:%1d:%1d/chipregs",
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$ENV{XBUS_NUMBER}, $ENV{UNIT_NUMBER}, $subunit;
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if(! -f $output) {
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my $xpd_name = sprintf("XPD-%1d%1d", $ENV{UNIT_NUMBER}, $subunit);
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$output = "/proc/xpp/$ENV{XBUS_NAME}/$xpd_name/chipregs";
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logit "OLD DRIVER: does not use /sys chipregs. Falling back to /proc"
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if -f $output;
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}
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}
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open(REG, ">$output") || die "Failed to open '$output': $!\n";
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my $oldfh = select REG;
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print "# Selecting subunit $subunit\n" if $opts{o};
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return $oldfh;
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}
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package PRI;
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sub gen {
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my $fmt = shift;
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$| = 1;
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printf "$fmt\n", @_;
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}
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sub init_quad() {
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main::select_subunit(0);
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PRI::gen "0 WD D6 20"; # GPC6.COMP_DIS=1
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# (Compatibility Mode Disable)
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# Tuning of clocking unit to the 16.384 MHz reference frequence
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# by setting Global Clock Mode registers (GCM[1:8]), same for E1 and T1/J1
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PRI::gen "0 WD 92 00"; # GCM1
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PRI::gen "0 WD 93 18"; # GCM2
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PRI::gen "0 WD 94 FB"; # GCM3
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PRI::gen "0 WD 95 0B"; # GCM4
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PRI::gen "0 WD 96 01"; # GCM5
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PRI::gen "0 WD 97 0B"; # GCM6
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PRI::gen "0 WD 98 DB"; # GCM7
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PRI::gen "0 WD 99 DF"; # GCM8
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}
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sub finish_quad() {
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PRI::gen "0 WD BB 2C"; # REGFP
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PRI::gen "0 WD BC FF"; # REGFD
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PRI::gen "0 WD BB AC"; # REGFP
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PRI::gen "0 WD BB 2B"; # REGFP
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PRI::gen "0 WD BC 00"; # REGFD
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PRI::gen "0 WD BB AB"; # REGFP
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PRI::gen "0 WD BB 2A"; # REGFP
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PRI::gen "0 WD BC FF"; # REGFD
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PRI::gen "0 WD BB AA"; # REGFP
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PRI::gen "0 WD BB 29"; # REGFP
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PRI::gen "0 WD BC FF"; # REGFD
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PRI::gen "0 WD BB A9"; # REGFP
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PRI::gen "0 WD BB 28"; # REGFP
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PRI::gen "0 WD BC 00"; # REGFD
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PRI::gen "0 WD BB A8"; # REGFP
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PRI::gen "0 WD BB 27"; # REGFP
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PRI::gen "0 WD BC FF"; # REGFD
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PRI::gen "0 WD BB A7"; # REGFP
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PRI::gen "0 WD BB 00"; # REGFP
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# PRI::gen "0 WD 80 00"; # PC1 (Port configuration 1): RPB_1.SYPR , XPB_1.SYPX
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}
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sub read_defaults() {
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if(XppConfig::read_config(\%settings)) {
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main::logit "Defaults from $settings{xppconf}";
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} else {
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main::logit "No defaults file, use hard-coded defaults.";
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}
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}
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package PRI::Port;
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sub new {
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my $pack = shift;
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my $port = { @_ };
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bless $port, $pack;
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return $port;
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}
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sub get_pri_protocol {
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my $port = shift;
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my $subunit = $port->{PORT_NUM};
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my $xpd_name = "XPD-$ENV{UNIT_NUMBER}$subunit";
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my $pri_protocol;
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my @keys = (
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"pri_protocol/connector:$ENV{XBUS_CONNECTOR}/$xpd_name",
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"pri_protocol/label:$ENV{XBUS_LABEL}/$xpd_name",
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"pri_protocol/$ENV{XBUS_NAME}/$xpd_name",
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"pri_protocol"
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);
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foreach my $k (@keys) {
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$k = lc($k); # Lowercase
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$pri_protocol = $settings{$k};
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if(defined $pri_protocol) {
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$port->{pri_protocol} = $pri_protocol;
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return $pri_protocol;
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}
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}
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return undef;
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}
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sub write_pri_info {
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my $port = shift;
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my $subunit = $port->{PORT_NUM};
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my $pri_protocol = $port->get_pri_protocol;
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my $xpd_name = sprintf("XPD-%1d%1d", $ENV{UNIT_NUMBER}, $subunit);
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if(defined $pri_protocol) {
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main::logit "$xpd_name: pri_protocol $pri_protocol";
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my $file = sprintf "/sys/bus/xpds/devices/%02d:%1d:%1d/pri_protocol",
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$ENV{XBUS_NUMBER}, $ENV{UNIT_NUMBER}, $subunit;
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if(! -f $file) {
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$file = "/proc/xpp/$ENV{XBUS_NAME}/$xpd_name/pri_info";
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main::logit "OLD DRIVER: does not use /sys chipregs. Falling back to /proc"
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if -f $file;
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}
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open(INFO, ">$file") || die "Failed to open '$file': $!\n";
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print INFO "$pri_protocol\n" || die "Failed writing '$pri_protocol' to '$file': $!\n";
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close INFO || die "Failed during close of '$file': $!\n";
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} else {
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main::logit "$xpd_name: pri_protocol not given. Driver will use defaults.";
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}
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}
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sub port_setup($) {
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my $port = shift;
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my $portno = $port->{PORT_NUM};
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my $pri_protocol = $port->get_pri_protocol;
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PRI::gen "$portno WD 28 40"; # XPM2.XLT Tristate
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my $cmr5 = sprintf("%x", ($portno << 5));
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PRI::gen "$portno WD 42 $cmr5"; # CMR5.DRSS=portno
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PRI::gen "$portno WD 26 F6"; # XPM0: Pulse Shape Programming for R1=18Ohms
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PRI::gen "$portno WD 27 02"; # XPM1: ...3V Pulse Level at the line (Vp-p=6v)
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# if (unchannelized)
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#PRI::gen "$portno WD 1F 22"; # LOOP (Channel Looback):
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# ECLB (Enable Channel Loop-Back)
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# CLA (Channel Address)
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PRI::gen "$portno WD 2B EF"; # IDL (Idle):
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# If channel loopback is enabled than transmit this code on the outgoing
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PRI::gen "$portno WD 1F 00"; # LOOP (Channel Looback):
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#if($portno eq 0){
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# PRI::gen "0 WD 1F 00"; # LOOP (Channel Looback):
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# # channels (XL1/XL2)
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#}else {
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# PRI::gen "0 WD 1F 20"; # LOOP (Channel Looback):
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#}
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# only one of the following loopbacks can be activated in the same time
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my $LIM1_RL = 0 << 1; # RL (Remote Loopback)
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my $lim1 = 0xB0 | $LIM1_RL;
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PRI::gen "$portno WD 37 %02X", $lim1;
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# LIM1: ~RL (Remote Loop bit 0x02),
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# ~DRS (Dual Rail Select, latch receive data while trasmit),
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# RIL1, RIL0 (Receive Input Treshold 0.62 V),
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# CLOS (Clear data in case of LOS)
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PRI::gen "$portno WD 3A 20"; # LIM2: SLT1, SLT0 = 01
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# (Receiver Slicer Threshold, the receive slicer
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# generates a mark (digital one) if the voltage at
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# RL1/2 exceeds 50% of the peak amplitude,
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# default, recommended in E1 mode).
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PRI::gen "$portno WD 38 0A"; # PCD: (Pulse Count Detection, LOS Detection after 176 consecutive 0s)
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PRI::gen "$portno WD 39 15"; # PCR: (Pulse Count Recovery, LOS Recovery after 22 ones in PCD interval)
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# Configure system interface
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PRI::gen "$portno WD 3E C2"; # SIC1: SSC1 (System clock ) is 8.192 Mhz,
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# SSD1 (System Data rate) is 8.192 Mbit/s,
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# ~BIM (Byte interleaved mode),
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# XBS (Transmit Buffer Size) is 2 frames
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PRI::gen "$portno WD 40 04"; # SIC3: Edges for capture, Synchronous Pulse Receive @Rising Edge
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PRI::gen "$portno WD 41 04"; # CMR4: RCLK is 8.192 MHz
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PRI::gen "$portno WD 43 04"; # CMR5: TCLK is 8.192 MHz
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PRI::gen "$portno WD 44 34"; # CMR6: Receive reference clock generated by channel 1,
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# RCLK is at 8.192 Mhz dejittered, Clock recovered from the line
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# TCLK is at 8.192 MHz is de-jittered by DCO-R to drive a6.176 MHz
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# clock on RCLK.*/
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PRI::gen "$portno WD 22 00"; # XC0: (Transmit Counter Offset = 497/T=2)
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PRI::gen "$portno WD 23 04"; # XC1: X=4 => T=4-X=0 offset
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PRI::gen "$portno WD 24 00"; # RC0: (Receive Counter Offset = 497/T=2)
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PRI::gen "$portno WD 25 05"; # RC1: Remaining part of RC0
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my $sic2 = sprintf("%x", 0x00 | ($portno << 1));
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PRI::gen "$portno WD 3F $sic2"; # SIC2: No FFS, no center receive elastic buffer, data active at phase ($sic >> 1)
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# enable the following interrupt sources
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PRI::gen "$portno WD 14 F7"; # IMR0 (Interrupt Mask Register2): Enable CASC_E1/RSC_T1
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PRI::gen "$portno WD 16 00"; # IMR2 (Interrupt Mask Register2): Enable ALL
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PRI::gen "$portno WD 17 3F"; # IMR3 ~ES, ~SEC (Enable ES and SEC interrupts)
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PRI::gen "$portno WD 18 00"; # IMR4: Enable ALL
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PRI::gen "$portno WD 46 80"; # GCR: (Global Configuration Register)
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# VIS (Masked Interrupts Visible)
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PRI::gen "$portno WD 08 04"; # IPC: SYNC is 8 Khz
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PRI::gen "$portno WD 02 51"; # CMDR (Command Register): RRES, XRES, SRES (Receiver/Transmitter reset)
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PRI::gen "$portno WD 02 00"; # CMDR
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PRI::gen "$portno WD 45 00"; # CMR2: External sources for SYPR, SCLKR, SYPX, SCLKX for TX and RX.
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# Configure ports
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PRI::gen "$portno WD 85 80"; # GPC1 (Global Port Configuration 1):
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#PRI::gen "$portno WD 85 00"; # GPC1 (Global Port Configuration 1):
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# SMM (System Interface Multiplex Mode)
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PRI::gen "$portno WD 80 00"; # PC1: SYPR/SYPX provided to RPA/XPA inputs
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PRI::gen "$portno WD 84 31"; # PC5: XMFS active low, SCLKR is input, RCLK is output (unused)
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PRI::gen "$portno WD 3B 00"; # Clear LCR1 - Loop Code Register 1
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# printk("TE110P: Successfully initialized serial bus for card\n");
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# Initialize PCM and SIG regs
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PRI::gen "$portno WD A0 00"; # TSEO (Time Slot Even/Odd Select)
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PRI::gen "$portno WD A1 FF"; # TSBS (Time Slot Bit Select)- only selected bits are used for HDLC channel 1
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# in selected time slots
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PRI::gen "$portno WD 03 89"; # Mode Register:
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# MDS (Mode Select) = 100 (No address comparison)
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||
|
|
# HRAC (Receiver Active - HDLC channel 1)
|
||
|
|
# RFT2 (HDLC Receive FIFO is 64 byte deep)
|
||
|
|
my $ccr1 = 0x18; # CCR1 (Common Configuration Register1)
|
||
|
|
# EITS (Enable Internal Time Slot 0 to 31 Signalling)
|
||
|
|
# ITF (Interframe Time Fill)
|
||
|
|
my $sysfs_pri_protocol;
|
||
|
|
if (defined $pri_protocol) {
|
||
|
|
$sysfs_pri_protocol = $pri_protocol;
|
||
|
|
} else {
|
||
|
|
my $file = sprintf "/sys/bus/xpds/devices/%02d:%1d:%1d/pri_protocol",
|
||
|
|
$ENV{XBUS_NUMBER}, $ENV{UNIT_NUMBER}, $portno;
|
||
|
|
open(F, $file) || die "$0: Failed opening '$file'";
|
||
|
|
$sysfs_pri_protocol = <F>;
|
||
|
|
close F;
|
||
|
|
chomp $sysfs_pri_protocol;
|
||
|
|
}
|
||
|
|
if($sysfs_pri_protocol eq 'T1') {
|
||
|
|
$ccr1 |= 0x80; # RSCC (Serial CAS Format Selection)
|
||
|
|
}
|
||
|
|
|
||
|
|
PRI::gen "$portno WD 09 %02X", $ccr1;
|
||
|
|
PRI::gen "$portno WD 0A 04"; # CCR2 (Common Configuration Register2)
|
||
|
|
# RCRC (enable CRC - HDLC channel 1enable CRC - HDLC channel 1)
|
||
|
|
PRI::gen "$portno WD 0C 00"; # RTR1 (Receive Time Slot register 1)
|
||
|
|
PRI::gen "$portno WD 0D 00"; # RTR2 (Receive Time Slot register 2)
|
||
|
|
PRI::gen "$portno WD 0E 00"; # RTR3 (Receive Time Slot register 3), TS16 (Enable time slot 16)
|
||
|
|
PRI::gen "$portno WD 0F 00"; # RTR4 (Receive Time Slot register 4)
|
||
|
|
|
||
|
|
PRI::gen "$portno WD 10 00"; # TTR1 (Transmit Time Slot register 1)
|
||
|
|
PRI::gen "$portno WD 11 00"; # TTR2 (Transmit Time Slot register 2)
|
||
|
|
PRI::gen "$portno WD 12 00"; # TTR3 (Transmit Time Slot register 3), TS16 (Enable time slot 16)
|
||
|
|
PRI::gen "$portno WD 13 00"; # TTR4 (Transmit Time Slot register 4)
|
||
|
|
|
||
|
|
# configure the best performance of the Bipolar Violation detection for all four channels
|
||
|
|
PRI::gen "$portno WD BD 00"; # BFR (Bugfix Register): ~BVP (Bipolar Violations),
|
||
|
|
# use Improved Bipolar Violation Detection instead
|
||
|
|
}
|
||
|
|
|
||
|
|
package main;
|
||
|
|
|
||
|
|
main::debug "Starting '$0'";
|
||
|
|
|
||
|
|
PRI::read_defaults;
|
||
|
|
|
||
|
|
sub main() {
|
||
|
|
my @ports;
|
||
|
|
my $subunit;
|
||
|
|
|
||
|
|
main::debug "main(): Initializing chip ($ENV{UNIT_SUBUNITS} ports)";
|
||
|
|
PRI::init_quad;
|
||
|
|
# Must initialize all 4 ports, regardless how much there are
|
||
|
|
for($subunit = 0; $subunit < 4; $subunit++) {
|
||
|
|
#main::debug "main(): Initializing subunit $subunit";
|
||
|
|
my $p = PRI::Port->new(
|
||
|
|
'PORT_NUM' => $subunit,
|
||
|
|
'EXIST' => ($subunit < $ENV{UNIT_SUBUNITS})
|
||
|
|
);
|
||
|
|
$p->port_setup;
|
||
|
|
push(@ports, $p);
|
||
|
|
}
|
||
|
|
PRI::finish_quad;
|
||
|
|
foreach my $p (@ports) {
|
||
|
|
if($p->{EXIST}) {
|
||
|
|
$p->write_pri_info;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
main;
|
||
|
|
|
||
|
|
main::debug "Ending '$0'";
|
||
|
|
|
||
|
|
close REG;
|
||
|
|
close STDERR;
|
||
|
|
exit 0;
|