641 lines
16 KiB
C
641 lines
16 KiB
C
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/proc_fs.h>
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#include <linux/interrupt.h>
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#include <linux/firmware.h>
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#include <linux/slab.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/blackfin.h>
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#include <asm/dma.h>
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#include <asm/cacheflush.h>
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#include <asm/uaccess.h>
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#include <dahdi/kernel.h>
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#include "mmapbus.h"
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#include "xbus-core.h"
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#include "dahdi_debug.h"
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#include "xdefs.h"
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#include "xproto.h"
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#include "xframe_queue.h"
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/* Check at compile time that sizeof(xframe_t) is a multiple of 4 */
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typedef char
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sizeof_xframe_t_should_be_divisible_by_4[((sizeof(xframe_t) % 4) ==
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0) * 2 - 1];
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#define ssync() __builtin_bfin_ssync()
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//#define AB_IN_BUF PF5
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/* firmware pins */
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#define DATA PG8
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#define NCONFIG PG9
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#define CONF_DONE PG10
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#define DCLK PG11
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#define NSTATUS PG12
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#ifdef DEBUG_VIA_GPIO
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/*
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* For debugging we can use the following two pins.
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* These two pins are not used *after initialization*
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*/
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#define DEBUG_GPIO1 CONF_DONE
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#define DEBUG_GPIO2 NSTATUS
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static int rx_intr_counter;
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#endif
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#define FPGA_RX_IRQ IRQ_PF7
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#define FPGA_TX_IRQ IRQ_PF4
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#define FPGA_BASE_ADDR ((volatile char __iomem *)0x203FA800)
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#define END_OF_FRAME 0x0001
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#define GET_LEN 0x0002
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#define START_RD_BURST 0x0008
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/* stand alone Astribank without USB (Asterisk BlackFin Mode) */
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#define AS_BF_MODE 0x0010
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/*
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* all data between Astribank and USB routed
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* thru BF(EchoCanceler BlackFin Mode)
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*/
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#define EC_BF_MODE 0x0020
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/* Astribank worke with USB only (no BlackFin Mode) */
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#define NO_BF_MODE 0x0040
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#define SET_XA_DIR 0x0080
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#define GET_XPD_STS 0x0100
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#define GET_CHECKSUM 0x0200
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static const char rcsid[] = "$Id$";
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static DEF_PARM(int, debug, 0, 0644, "Print DBG statements");
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static DEF_PARM(int, notxrx, 0, 0644, "Don't send or receive anything");
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struct counter {
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long intr_min, intr_max;
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long intr_avg, intr_count;
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};
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static xbus_t *global_xbus;
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static bool tx_ready = 1;
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static DEFINE_SPINLOCK(tx_ready_lock);
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static struct xframe_queue txpool;
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static unsigned int pcm_in_pool_count;
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static bool disconnecting;
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static struct kmem_cache *xframe_cache;
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static struct counter tx_counter, rx_counter;
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static unsigned long pcm_dropped;
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static void print_buffer(const char *msg, const char *buf, int len)
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{
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int i;
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printk(KERN_ERR "%s", msg);
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for (i = 0; i < len; i++)
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printk("%02X ", (unsigned char)buf[i]);
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printk("\n");
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}
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static void update_counter(struct counter *c, struct timeval *tv1)
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{
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struct timeval tv2;
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long diff;
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do_gettimeofday(&tv2);
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diff = usec_diff(&tv2, tv1);
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if (c->intr_min > diff)
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c->intr_min = diff;
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if (c->intr_max < diff)
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c->intr_max = diff;
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c->intr_avg =
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(c->intr_avg * c->intr_count + diff) / (c->intr_count + 1);
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c->intr_count++;
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}
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static irqreturn_t xpp_mmap_rx_irq(int irq, void *dev_id)
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{
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unsigned short rxcnt;
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xbus_t *xbus;
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xframe_t *xframe;
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__u8 *buf;
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bool in_use = 0;
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struct timeval tv1;
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do_gettimeofday(&tv1);
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if (unlikely(disconnecting))
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return IRQ_HANDLED;
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xbus = xbus_num(global_xbus->num);
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BUG_ON(!xbus);
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if (!XBUS_GET(xbus)) {
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if (printk_ratelimit())
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XBUS_ERR(xbus, "Dropping packet. Is shutting down.\n");
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goto out;
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}
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in_use = 1;
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outw(GET_LEN, FPGA_BASE_ADDR + 4);
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rxcnt = inw(FPGA_BASE_ADDR);
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if (rxcnt < 3) {
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if (printk_ratelimit())
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NOTICE("Got %d bytes\n", rxcnt);
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goto out;
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}
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if (rxcnt >= XFRAME_DATASIZE) {
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if (printk_ratelimit())
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ERR("Bad rxcnt=%d\n", rxcnt);
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goto out;
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}
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xframe = ALLOC_RECV_XFRAME(xbus);
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if (!xframe) {
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if (printk_ratelimit())
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XBUS_ERR(xbus, "Empty receive_pool\n");
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goto out;
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}
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buf = xframe->packets;
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atomic_set(&xframe->frame_len, rxcnt);
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do_gettimeofday(&xframe->tv_received);
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#ifdef DEBUG_VIA_GPIO
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if (rx_intr_counter & 1)
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bfin_write_PORTGIO_SET(DEBUG_GPIO1);
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else
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bfin_write_PORTGIO_CLEAR(DEBUG_GPIO1);
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#endif
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outw(START_RD_BURST, FPGA_BASE_ADDR + 4);
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insw((unsigned long)FPGA_BASE_ADDR, buf, rxcnt / 2);
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#if 0
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for (count = 0; count < rxcnt; count += 2) {
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unsigned short v = inw(FPGA_BASE_ADDR);
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buf[count] = v & 0xFF;
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buf[count + 1] = v >> 8;
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}
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#endif
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if (rxcnt & 1)
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buf[rxcnt - 1] = inw(FPGA_BASE_ADDR);
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/*
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* Sanity check: length of first packet in frame
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* should be no more than the frame length
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*/
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if (((buf[0] | (buf[1] << 8)) & 0x3FF) > rxcnt) {
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if (printk_ratelimit()) {
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ERR("Packet len=%d, frame len=%d\n",
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(buf[0] | (buf[1] << 8)) & 0x3FF, rxcnt);
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print_buffer("16 bytes of packet: ", buf, 16);
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}
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goto free;
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}
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if (debug && buf[2] != 0x12)
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print_buffer("Received: ", buf, rxcnt);
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if (!notxrx) {
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xbus_receive_xframe(xbus, xframe);
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#ifdef DEBUG_VIA_GPIO
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if (rx_intr_counter & 1)
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bfin_write_PORTGIO_SET(DEBUG_GPIO2);
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else
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bfin_write_PORTGIO_CLEAR(DEBUG_GPIO2);
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#endif
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goto out;
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}
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free:
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FREE_RECV_XFRAME(xbus, xframe);
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out:
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if (in_use)
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XBUS_PUT(xbus);
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#ifdef DEBUG_VIA_GPIO
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rx_intr_counter++;
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#endif
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update_counter(&rx_counter, &tv1);
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return IRQ_HANDLED;
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}
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static void send_buffer(unsigned char *buf, unsigned long len)
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{
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if (debug && len >= 3 && buf[2] != 0x11)
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print_buffer("Sent: ", buf, len);
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outsw((unsigned long)FPGA_BASE_ADDR, buf, len / 2);
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if (len & 1)
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outw((unsigned short)buf[len - 1], FPGA_BASE_ADDR);
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outw(END_OF_FRAME, FPGA_BASE_ADDR + 4);
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}
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static irqreturn_t xpp_mmap_tx_irq(int irq, void *dev_id)
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{
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unsigned long flags;
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xbus_t *xbus;
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xframe_t *xframe;
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struct timeval tv1;
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do_gettimeofday(&tv1);
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if (unlikely(disconnecting)) {
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update_counter(&tx_counter, &tv1);
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return IRQ_HANDLED;
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}
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spin_lock_irqsave(&tx_ready_lock, flags);
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xframe = xframe_dequeue(&txpool);
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if (!xframe) {
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tx_ready = 1;
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spin_unlock_irqrestore(&tx_ready_lock, flags);
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update_counter(&tx_counter, &tv1);
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return IRQ_HANDLED;
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}
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tx_ready = 0;
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if (XPACKET_IS_PCM((xpacket_t *)xframe->packets))
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pcm_in_pool_count--;
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spin_unlock_irqrestore(&tx_ready_lock, flags);
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xbus = (xbus_t *)xframe->priv;
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BUG_ON(!xbus);
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xbus = xbus_num(xbus->num);
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BUG_ON(!xbus);
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send_buffer(xframe->packets, XFRAME_LEN(xframe));
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FREE_SEND_XFRAME(xbus, xframe);
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update_counter(&tx_counter, &tv1);
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return IRQ_HANDLED;
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}
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static int xframe_send_common(xbus_t *xbus, xframe_t *xframe, bool pcm)
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{
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unsigned long flags;
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if (unlikely(disconnecting)) {
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FREE_SEND_XFRAME(xbus, xframe);
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return -ENODEV;
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}
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if (unlikely(notxrx)) {
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FREE_SEND_XFRAME(xbus, xframe);
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return 0;
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}
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spin_lock_irqsave(&tx_ready_lock, flags);
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if (tx_ready) {
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tx_ready = 0;
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send_buffer(xframe->packets, XFRAME_LEN(xframe));
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spin_unlock_irqrestore(&tx_ready_lock, flags);
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FREE_SEND_XFRAME(xbus, xframe);
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} else {
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if (pcm && pcm_in_pool_count >= 1) {
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static int rate_limit;
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if ((rate_limit++ % 1000) == 0)
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XBUS_ERR(xbus,
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"Dropped PCM xframe "
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"(pcm_in_pool_count=%d).\n",
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pcm_in_pool_count);
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FREE_SEND_XFRAME(xbus, xframe);
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pcm_dropped++;
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} else {
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if (!xframe_enqueue(&txpool, xframe)) {
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static int rate_limit;
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spin_unlock_irqrestore(&tx_ready_lock, flags);
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if ((rate_limit++ % 1000) == 0)
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XBUS_ERR(xbus,
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"Dropped xframe. "
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"Cannot enqueue.\n");
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FREE_SEND_XFRAME(xbus, xframe);
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return -E2BIG;
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}
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if (pcm)
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pcm_in_pool_count++;
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}
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spin_unlock_irqrestore(&tx_ready_lock, flags);
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}
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return 0;
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}
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static xframe_t *alloc_xframe(xbus_t *xbus, gfp_t gfp_flags)
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{
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xframe_t *xframe = kmem_cache_alloc(xframe_cache, gfp_flags);
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if (!xframe) {
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static int rate_limit;
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if ((rate_limit++ % 1000) < 5)
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XBUS_ERR(xbus, "frame allocation failed (%d)\n",
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rate_limit);
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return NULL;
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}
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xframe_init(xbus, xframe, ((__u8 *)xframe) + sizeof(xframe_t),
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XFRAME_DATASIZE, xbus);
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return xframe;
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}
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static void free_xframe(xbus_t *xbus, xframe_t *xframe)
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{
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memset(xframe, 0, sizeof(*xframe));
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kmem_cache_free(xframe_cache, xframe);
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}
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static int xframe_send_pcm(xbus_t *xbus, xframe_t *xframe)
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{
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return xframe_send_common(xbus, xframe, 1);
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}
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static int xframe_send_cmd(xbus_t *xbus, xframe_t *xframe)
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{
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return xframe_send_common(xbus, xframe, 0);
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}
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static struct xbus_ops xmmap_ops = {
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.xframe_send_pcm = xframe_send_pcm,
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.xframe_send_cmd = xframe_send_cmd,
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.alloc_xframe = alloc_xframe,
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.free_xframe = free_xframe,
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};
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static int fill_proc_queue(char *p, struct xframe_queue *q)
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{
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int len;
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len = sprintf(p,
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"%-15s: counts %3d, %3d, %3d worst %3d, overflows %3d "
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"worst_lag %02ld.%ld ms\n",
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q->name, q->steady_state_count, q->count, q->max_count,
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q->worst_count, q->overflows, q->worst_lag_usec / 1000,
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q->worst_lag_usec % 1000);
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xframe_queue_clearstats(q);
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return len;
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}
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static int fill_proc_counter(char *p, struct counter *c)
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{
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return sprintf(p, "min=%ld\nmax=%ld\navg=%ld\ncount=%ld\n", c->intr_min,
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c->intr_max, c->intr_avg, c->intr_count);
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}
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static int xpp_mmap_proc_read(char *page, char **start, off_t off, int count,
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int *eof, void *data)
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{
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int len = 0;
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len += fill_proc_queue(page + len, &txpool);
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len += sprintf(page + len, "pcm_in_pool_count=%d\n", pcm_in_pool_count);
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len += sprintf(page + len, "pcm_dropped=%lu\n", pcm_dropped);
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len += sprintf(page + len, "\nrx_counter:\n");
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len += fill_proc_counter(page + len, &rx_counter);
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len += sprintf(page + len, "\ntx_counter:\n");
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len += fill_proc_counter(page + len, &tx_counter);
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if (len <= off + count) {
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*eof = 1;
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tx_counter.intr_min = rx_counter.intr_min = INT_MAX;
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tx_counter.intr_max = rx_counter.intr_max = 0;
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tx_counter.intr_avg = rx_counter.intr_avg = 0;
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tx_counter.intr_count = rx_counter.intr_count = 0;
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}
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*start = page + off;
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len -= off;
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if (len > count)
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len = count;
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if (len < 0)
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len = 0;
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return len;
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}
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static int xpp_mmap_proc_write(struct file *file, const char __user *buffer,
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unsigned long count, void *data)
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{
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int i = 0;
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char *txchunk, *p, *endp;
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if (count >= XFRAME_DATASIZE * 3 + 10)
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return -EINVAL;
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p = txchunk = kmalloc(count + 1, GFP_KERNEL);
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if (copy_from_user(txchunk, buffer, count)) {
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count = -EFAULT;
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goto out;
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}
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txchunk[count] = '\0';
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while (*p) {
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unsigned long value;
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while (*p == ' ' || *p == '\t' || *p == '\n' || *p == '\r')
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p++;
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if (*p == '\0')
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break;
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value = simple_strtoul(p, &endp, 16);
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if (endp == p || value > 0xFF) {
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INFO("%s: Bad input\n", __func__);
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count = -EINVAL;
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goto out;
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}
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p = endp;
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txchunk[i++] = (char)value;
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}
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send_buffer(txchunk, i);
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|
out:
|
||
|
kfree(txchunk);
|
||
|
return count;
|
||
|
}
|
||
|
|
||
|
static struct mmap_driver astribank_driver = {
|
||
|
.module = THIS_MODULE,
|
||
|
.driver = {
|
||
|
.name = "xpp_mmap",
|
||
|
},
|
||
|
};
|
||
|
|
||
|
static struct mmap_device astribank_dev = {
|
||
|
.name = "astribank0",
|
||
|
.driver = &astribank_driver,
|
||
|
};
|
||
|
|
||
|
static int __init xpp_mmap_load_fpga(u8 * data, size_t size)
|
||
|
{
|
||
|
size_t i;
|
||
|
/* set data, nconfig and dclk to port out */
|
||
|
bfin_write_PORTGIO_DIR(bfin_read_PORTGIO_DIR() | DATA | NCONFIG | DCLK);
|
||
|
bfin_write_PORTG_FER(bfin_read_PORTG_FER() & ~(DATA | NCONFIG | DCLK));
|
||
|
/* set conf_done and nstatus to port in */
|
||
|
bfin_write_PORTGIO_DIR(
|
||
|
bfin_read_PORTGIO_DIR() & ~(CONF_DONE | NSTATUS));
|
||
|
bfin_write_PORTGIO_INEN(
|
||
|
bfin_read_PORTGIO_INEN() & ~(DATA | NCONFIG | DCLK));
|
||
|
bfin_write_PORTGIO_INEN(bfin_read_PORTGIO_INEN() | CONF_DONE | NSTATUS);
|
||
|
|
||
|
/* reset fpga during configuration holds nCONFIG low */
|
||
|
bfin_write_PORTGIO_CLEAR(NCONFIG);
|
||
|
udelay(40); /* Tcfg ~40us delay */
|
||
|
/* transition nCONFIG to high - reset end. */
|
||
|
bfin_write_PORTGIO_SET(NCONFIG);
|
||
|
udelay(40); /* Tcf2ck ~40us delay */
|
||
|
if (!(bfin_read_PORTGIO() & NSTATUS))
|
||
|
return -EIO; /* report reset faill - Tcf2st1 pass */
|
||
|
|
||
|
#if 0
|
||
|
if (!(bfin_read_PORTGIO() & CONF_DONE))
|
||
|
return -EIO;
|
||
|
#endif
|
||
|
bfin_write_PORTGIO_CLEAR(DCLK);
|
||
|
for (i = 0; i < size; i++) { /* loop EP2OUT buffer data to FPGA */
|
||
|
int j;
|
||
|
u8 __u8 = data[i];
|
||
|
/*
|
||
|
* Send the configuration data through the DATA0 pin
|
||
|
* one bit at a time.
|
||
|
*/
|
||
|
for (j = 0; j < 8; j++)
|
||
|
{
|
||
|
if (__u8 & 1)
|
||
|
bfin_write_PORTGIO_SET(DATA);
|
||
|
else
|
||
|
bfin_write_PORTGIO_CLEAR(DATA);
|
||
|
__u8 >>= 1;
|
||
|
bfin_write_PORTGIO_SET(DCLK);
|
||
|
bfin_write_PORTGIO_CLEAR(DCLK);
|
||
|
}
|
||
|
if (!(bfin_read_PORTGIO() & NSTATUS))
|
||
|
return -EIO; /* check the nSTATUS */
|
||
|
}
|
||
|
bfin_write_PORTGIO_CLEAR(DATA);
|
||
|
udelay(1);
|
||
|
if (!(bfin_read_PORTGIO() & CONF_DONE))
|
||
|
return -EIO;
|
||
|
#ifdef DEBUG_VIA_GPIO
|
||
|
/*
|
||
|
* Normal initialization is done. Now we can reuse
|
||
|
* some pins that were used only during initialization
|
||
|
* to be used for debugging from now on.
|
||
|
*/
|
||
|
/* set to port out */
|
||
|
bfin_write_PORTGIO_DIR(
|
||
|
bfin_read_PORTGIO_DIR() | DEBUG_GPIO1 | DEBUG_GPIO2);
|
||
|
bfin_write_PORTG_FER(bfin_read_PORTG_FER() &
|
||
|
~(DEBUG_GPIO1 | DEBUG_GPIO2));
|
||
|
bfin_write_PORTGIO_INEN(bfin_read_PORTGIO_INEN() &
|
||
|
~(DEBUG_GPIO1 | DEBUG_GPIO2));
|
||
|
#endif
|
||
|
udelay(40); /* tCD2UM - CONF_DONE high to user mode */
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
static void __exit xpp_mmap_unload_fpga(void)
|
||
|
{
|
||
|
/* reset fpga during configuration holds nCONFIG low */
|
||
|
bfin_write_PORTGIO_CLEAR(NCONFIG);
|
||
|
udelay(40); /* Tcfg ~40us delay */
|
||
|
/* disable output pin */
|
||
|
bfin_write_PORTGIO_DIR(
|
||
|
bfin_read_PORTGIO_DIR() & ~(DATA | NCONFIG | DCLK));
|
||
|
/* disable input buffer */
|
||
|
bfin_write_PORTGIO_INEN(
|
||
|
bfin_read_PORTGIO_INEN() & ~(CONF_DONE | NSTATUS));
|
||
|
INFO("FPGA Firmware unloaded\n");
|
||
|
}
|
||
|
|
||
|
static int __init xpp_mmap_load_firmware(void)
|
||
|
{
|
||
|
const struct firmware *fw;
|
||
|
int ret;
|
||
|
if ((ret =
|
||
|
request_firmware(&fw, "astribank.bin", &astribank_dev.dev)) < 0)
|
||
|
return ret;
|
||
|
xpp_mmap_load_fpga(fw->data, fw->size);
|
||
|
release_firmware(fw);
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
static int __init xpp_mmap_init(void)
|
||
|
{
|
||
|
int ret;
|
||
|
struct proc_dir_entry *proc_entry;
|
||
|
|
||
|
if ((ret = register_mmap_bus()) < 0)
|
||
|
goto bus_reg;
|
||
|
if ((ret = register_mmap_driver(&astribank_driver)) < 0)
|
||
|
goto driver_reg;
|
||
|
if ((ret = register_mmap_device(&astribank_dev)) < 0)
|
||
|
goto dev_reg;
|
||
|
if ((ret = xpp_mmap_load_firmware()) < 0) {
|
||
|
ERR("xpp_mmap_load_firmware() failed, errno=%d\n", ret);
|
||
|
goto fail_fw;
|
||
|
}
|
||
|
|
||
|
if ((ret =
|
||
|
request_irq(FPGA_RX_IRQ, xpp_mmap_rx_irq, IRQF_TRIGGER_RISING,
|
||
|
"xpp_mmap_rx", NULL)) < 0) {
|
||
|
ERR("Unable to attach to RX interrupt %d\n", FPGA_RX_IRQ);
|
||
|
goto fail_irq_rx;
|
||
|
}
|
||
|
if ((ret =
|
||
|
request_irq(FPGA_TX_IRQ, xpp_mmap_tx_irq, IRQF_TRIGGER_RISING,
|
||
|
"xpp_mmap_tx", NULL)) < 0) {
|
||
|
ERR("Unable to attach to TX interrupt %d\n", FPGA_TX_IRQ);
|
||
|
goto fail_irq_tx;
|
||
|
}
|
||
|
if (!request_region((resource_size_t) FPGA_BASE_ADDR, 8, "xpp_mmap")) {
|
||
|
ERR("Unable to request memory region at %p\n", FPGA_BASE_ADDR);
|
||
|
goto fail_region;
|
||
|
}
|
||
|
outw(AS_BF_MODE, FPGA_BASE_ADDR + 4);
|
||
|
|
||
|
xframe_cache =
|
||
|
kmem_cache_create("xframe_cache",
|
||
|
sizeof(xframe_t) + XFRAME_DATASIZE, 0, 0,
|
||
|
NULL);
|
||
|
if (!xframe_cache) {
|
||
|
ret = -ENOMEM;
|
||
|
goto fail_cache;
|
||
|
}
|
||
|
/* interface with Dahdi */
|
||
|
global_xbus = xbus_new(&xmmap_ops, XFRAME_DATASIZE, NULL);
|
||
|
if (!global_xbus) {
|
||
|
ret = -ENOMEM;
|
||
|
goto fail_xbus;
|
||
|
}
|
||
|
strncpy(global_xbus->connector, "mmap", XBUS_DESCLEN);
|
||
|
strncpy(global_xbus->label, "mmap:0", LABEL_SIZE);
|
||
|
|
||
|
xframe_queue_init(&txpool, 10, 200, "mmap_txpool", global_xbus);
|
||
|
if (!
|
||
|
(proc_entry =
|
||
|
create_proc_entry("xpp_mmap", 0, global_xbus->proc_xbus_dir))) {
|
||
|
ERR("create_proc_entry() failed\n");
|
||
|
ret = -EINVAL;
|
||
|
goto fail_proc;
|
||
|
}
|
||
|
proc_entry->write_proc = xpp_mmap_proc_write;
|
||
|
proc_entry->read_proc = xpp_mmap_proc_read;
|
||
|
/* Go xbus, go! */
|
||
|
xbus_connect(global_xbus);
|
||
|
INFO("xpp_mmap module loaded\n");
|
||
|
|
||
|
return 0;
|
||
|
|
||
|
fail_proc:
|
||
|
xbus_disconnect(global_xbus);
|
||
|
fail_xbus:
|
||
|
kmem_cache_destroy(xframe_cache);
|
||
|
fail_cache:
|
||
|
release_region((resource_size_t) FPGA_BASE_ADDR, 8);
|
||
|
fail_region:
|
||
|
free_irq(FPGA_TX_IRQ, NULL);
|
||
|
fail_irq_tx:
|
||
|
free_irq(FPGA_RX_IRQ, NULL);
|
||
|
fail_irq_rx:
|
||
|
fail_fw:
|
||
|
unregister_mmap_device(&astribank_dev);
|
||
|
dev_reg:
|
||
|
unregister_mmap_driver(&astribank_driver);
|
||
|
driver_reg:
|
||
|
unregister_mmap_bus();
|
||
|
bus_reg:
|
||
|
return ret;
|
||
|
}
|
||
|
|
||
|
static void __exit xpp_mmap_exit(void)
|
||
|
{
|
||
|
xbus_t *xbus;
|
||
|
DBG(GENERAL, "\n");
|
||
|
disconnecting = 1;
|
||
|
xbus = xbus_num(global_xbus->num);
|
||
|
remove_proc_entry("xpp_mmap", xbus->proc_xbus_dir);
|
||
|
xframe_queue_clear(&txpool);
|
||
|
xbus_disconnect(xbus);
|
||
|
kmem_cache_destroy(xframe_cache);
|
||
|
|
||
|
release_region((resource_size_t) FPGA_BASE_ADDR, 8);
|
||
|
free_irq(FPGA_RX_IRQ, NULL);
|
||
|
free_irq(FPGA_TX_IRQ, NULL);
|
||
|
|
||
|
unregister_mmap_device(&astribank_dev);
|
||
|
unregister_mmap_driver(&astribank_driver);
|
||
|
unregister_mmap_bus();
|
||
|
xpp_mmap_unload_fpga();
|
||
|
INFO("xpp_mmap module unloaded\n");
|
||
|
}
|
||
|
|
||
|
module_init(xpp_mmap_init);
|
||
|
module_exit(xpp_mmap_exit);
|
||
|
MODULE_AUTHOR("Alexander Landau <landau.alex@gmail.com>");
|
||
|
MODULE_LICENSE("GPL");
|